| 主权项 |
1. A semiconductor device comprising a switching unit having at least one switching element,
wherein a plurality of said switching units are connected in series to each other, wherein said semiconductor device further includes a plurality of capacitances, one electrode of each of said capacitances being connected to corresponding one of connecting sections of said plurality of switching units or to one end of said plurality of switching units, wherein signals having a constant voltage or signals having a same phase are supplied to the other electrode of each of said plurality of capacitances, wherein said semiconductor device further includes a light-shielding film formed for at least the switching unit, among said plurality of switching units, that has a capacitance disposed on both sides of said switching unit, wherein said plurality of switching units are constituted of a first, a second, and a third switching units which are connected in series, and wherein when a capacitance value of a first capacitance connected between said first and said second switching units is Cs1, a capacitance value of a second capacitance connected between said second and said third switching units is Cs2, a capacitance value of a third capacitance connected to an end of said third switching unit on the side opposite from said second switching unit is Cs3, and an OFF leakage current values Ioff of said second and said third switching units are approximated in Equation (1), capacitance ratios R1, R2, and R3 of said first, second, and third capacitances satisfy Equation (4), Equation (5), and Equation (6) below, respectively:
Ioff=Io×Vdsn (1)R1={n×n/(n×n+n+1)}×{(C+Cv)/C}±0.15 (4)R2={n/(n×n+n+1)}×{(C+Cv)/C}±0.15 (5)R3={1/(n×n+n+1)}×{(C−n×n×Cv−n×Cv)/C}±0.10 (6), where Vds is a voltage between one end and the other end of said second switching unit and said third switching unit (0≦Vds≦1); Io is a leakage current when Vds=1(V); n=0.7 to 0.8; Cs1:Cs2:Cs3=R1:R2:R3; R1+R2+R3=1; Cs1+Cs2+Cs3=C; and Cv is a capacitance value of an external capacitance connected in parallel to said third capacitance for said third switching unit. |
