发明名称 Switch circuit
摘要 A switching circuit includes a plurality of switching elements connected between an input node and an output node and each comprising a first and second electrode connected to the input node and output node, respectively. The switching elements include a control electrode for controlling electrical conductance between the first and second electrodes such the switching element can be switched between an ON conductance state and an OFF conductance state. A detection circuit in the switching circuit outputs a detection value corresponding to an output current at the output node. A control circuit changes the conductance state of at least one switching element such that the summed total of the parasitic capacitances of all switching elements in the ON state decreases as the output current decreases as indicated by the detection value.
申请公布号 US9059703(B2) 申请公布日期 2015.06.16
申请号 US201414155104 申请日期 2014.01.14
申请人 Kabushiki Kaisha Toshiba 发明人 Shoji Masatsugu;Kanamaru Kenji;Takahashi Masayoshi
分类号 H03K17/687;B23K11/24;H03K17/16 主分类号 H03K17/687
代理机构 Patterson & Sheridan, LLP 代理人 Patterson & Sheridan, LLP
主权项 1. A switch circuit, comprising: a plurality of switching elements, including first, second, and third switching elements, each switching element connected between an input node and an output node and including: a first electrode connected to the input node;a second electrode connected to the output node; anda control electrode which controls electrical conductance between the first electrode and the second electrode such that the switching element can be switched between an ON state and an OFF state, the first switching element having a greater on-state resistance and a greater parasitic capacitance than those of the second switching element, and the second switching element having a greater on-site resistance and a greater parasitic capacitance than those of the third switching element; a detection circuit configured to output a detection value corresponding to a voltage difference between a voltage at the input node and a voltage at the output node; and a control circuit configured to switch the first switching element to the OFF state and the second switching element to the ON state such that only the second switching element is placed in the ON state among the plurality of switching elements when the detection value decreases to a first predetermined value, and then switch the second switching element to the OFF state and the third switching element to the ON state such that only the third switching element is placed in the ON state among the plurality of switching elements, when the detection value decreases to the first predetermined value again, each of the parasitic capacitances of the switching elements being equal to a parasitic capacitance between the control electrode of the respective switching element and the second electrode of the respective switching element.
地址 Tokyo JP