发明名称 Self-aligned charge-trapping layers for non-volatile data storage, processes of forming same, and devices containing same
摘要 A discrete storage element film is disposed above a tunneling dielectric film against a shallow trench isolation structure and under conditions to resist formation of the discrete storage element film upon vertical exposures of the shallow trench isolation structure. A discrete storage element film is also disposed above a tunneling dielectric film against a recessed isolation structure. A microelectronic device incorporates the discrete storage element film. A computing system incorporates the microelectronic device.
申请公布号 US9059301(B2) 申请公布日期 2015.06.16
申请号 US201414267084 申请日期 2014.05.01
申请人 Intel Corporation 发明人 Min Kyu S.
分类号 H01L27/115;H01L29/788;H01L21/762;H01L29/423;H01L29/06 主分类号 H01L27/115
代理机构 Blakely, Sokoloff, Taylor & Zafman LLP 代理人 Blakely, Sokoloff, Taylor & Zafman LLP
主权项 1. An apparatus comprising: a shallow trench isolation (STI) in a semiconductive substrate, wherein the STI includes a prominence with a sidewall, the prominence having a top width wider than a bottom width of the prominence; a discrete storage element film disposed on a tunnel dielectric film, wherein the discrete storage element film is disposed without completely covering a reentrant undercut form factor of the sidewall of the STI; a gate dielectric disposed above the discrete storage element film, wherein the gate dielectric is a non-continuous film having portions above the STI and above the semiconductive substrate but not along the sidewall of the prominence of the STI; a wordline disposed above the gate dielectric; and an active area disposed in the semiconductive substrate, adjacent to and below the discrete storage element film.
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