Method of forming an erbium silicide metal gate stack FinFET device via a physical vapor deposition nanolaminate approach

摘要

Methods to form metal gate transistor devices are disclosed. Erbium silicide layers can be used in CMOS transistors in which the work function of the erbium silicide layers can be tuned for use in PMOS and NMOS devices. A nanolaminate sputtering approach can be used in which silicon and erbium layers are alternatingly deposited to determine optimum layer properties, composition profiles, and erbium to silicon ratios for a particular gate stack.

主权项

1. A method of forming a metal gate stack finFET device, the method comprising:
providing a substrate; forming a first layer on the substrate over a channel region,
wherein the first layer comprises a dielectric material; forming a multilayer above the first layer, wherein the multilayer comprises a second layer and a third layer,
wherein the second layer comprises silicon,wherein the third layer comprises erbium; and annealing the second and third layers to form an erbium silicide layer,
wherein the first layer and the erbium silicide layer form a metal gate stack; wherein the first layer and the erbium silicide layer surround the channel region on two sides; forming a source region and a drain region on the substrate at opposite ends of the metal gate stack,
wherein the source region and the drain region are formed on the substrate before forming the first layer, and; doping the source region and the drain region,
wherein the erbium silicide layer prevents doping of the channel region.