Package with SoC and Integrated memory

摘要

A semiconductor package includes a processor die (e.g., an SoC) and one or more memory die (e.g., DRAM) coupled to a ball grid array (BGA) substrate. The processor die and the memory die are coupled to opposite sides of the BGA substrate using terminals (e.g., solder balls). The package may be coupled to a printed circuit board (PCB) using one or more terminals positioned around the perimeter of the processor die. The PCB may include a recess with at least part of the processor die being positioned in the recess. Positioning at least part of the processor die in the recess reduces the overall height of the semiconductor package assembly. A voltage regulator may also be coupled to the BGA substrate on the same side as the processor die with at least part of the voltage regulator being positioned in the recess a few millimeters from the processor die.

主权项

1. A semiconductor device package assembly, comprising:
a printed circuit board (PCB) with a recess on an upper surface of the PCB; a ball grid array (BGA) substrate coupled to the upper surface of the PCB; a system on a chip (SoC) coupled to a lower surface of the BGA substrate, wherein at least a portion of the SoC is located in the recess on the upper surface of the PCB; and at least one memory die coupled to an upper surface of the BGA substrate.