| 摘要 |
The present invention relates to an interface apparatus of a NAND flash memory test including a real time defect judgment circuit in the NAND flash memory test and an operation method thereof. The operation method of the present invention comprises a test system interface unit receiving test output data from a semiconductor test system during test-programing of a NAND flash memory, and transmitting a test result of detection judgment to the semiconductor test system to be recognized; a DUT interface unit receiving DUT output data from a DUT when reading the NAND flash memory; a memory unit for pre-setting and storing a sector range value and a fail bit limit value, and storing the test output data and the test result of detect judgment; and a control unit for storing the test output data received from the test system interface unit in the memory unit, comparing the DUT output data received from the DUT interface unit with the test output data stored in the memory unit, counting a fail bit by a sector unit stored in the memory unit, determining the defect by comparing the counted number with the fail bit limit value stored in the memory unit, storing the test result of the defect judgment in the memory unit, and transferring the same to the test system interface unit. |
