发明名称 DATA CIRCUIT
摘要 A circuit includes a first data line, a first plurality of memory cells coupled with the first data line, and a data transfer circuit coupled with the first data line. The data transfer circuit includes an output logic gate. The data transfer circuit is configured to, in a first operation mode in which the first plurality of memory cells is in a standby mode, set an output node of the output logic gate to be free from electrically coupled with a reference voltage and a supply voltage through the output logic gate. The data transfer circuit is configured to, in a second operation mode in which a memory cell of the first plurality of memory cells is selected to be read, set the output node of the output logic gate to be either electrically coupled with the reference voltage or with the supply voltage through the output logic gate.
申请公布号 US2015162076(A1) 申请公布日期 2015.06.11
申请号 US201514624094 申请日期 2015.02.17
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 WANG Bing
分类号 G11C11/419 主分类号 G11C11/419
代理机构 代理人
主权项 1. A circuit comprising: a first data line; a first plurality of memory cells coupled with the first data line; and a data transfer circuit coupled with the first data line, the data transfer circuit comprising an output logic gate, the data transfer circuit being configured to in a first operation mode of the circuit in which the first plurality of memory cells is in a standby mode, set the first data line to be floating and to have a first set of leakage paths associated thereto toward a reference voltage, and the first data line is caused to be pulled toward the reference voltage through one or more of the first set of leakage paths, andset an output node of the output logic gate to be free from electrically coupled with the reference voltage through the output logic gate and free from electrically coupled with a supply voltage through the output logic gate; andin a second operation mode of the circuit in which a memory cell of the first plurality of memory cells is selected to be read, set a voltage level of the first data line to reflect data stored in the memory cell of the first plurality of memory cells, andset the output node of the output logic gate to be either electrically coupled with the reference voltage through the output logic gate or electrically coupled with the supply voltage through the output logic gate based on the voltage level of the first data line.
地址 Hsinchu TW