发明名称 MULTIPLE RETRY READS IN A READ CHANNEL OF A MEMORY
摘要 An apparatus having a circuit and a decoder is disclosed. The circuit is configured to (i) adjust an initial one of a plurality of reference voltages in a read channel of a memory by shifting the initial reference voltage an amount toward a center of a window and (ii) read a codeword from the memory a number of times. The window bounds a sweep of the reference voltages. Each retry of the reads uses a respective reference voltage from a pattern of the reference voltages. The pattern is symmetrically spaced about the initial reference voltage. The pattern fits in the window. The decoder is configured to generate read data by performing an iterative decoding procedure on the codeword based on the reads.
申请公布号 US2015162057(A1) 申请公布日期 2015.06.11
申请号 US201314136283 申请日期 2013.12.20
申请人 LSI Corporation 发明人 Alhussien AbdelHakim S.;Wu Yunxiang;Sankaranarayanan Sundararajan;Chen Zhengang;Haratsch Erich F.
分类号 G11C7/12 主分类号 G11C7/12
代理机构 代理人
主权项 1. An apparatus comprising: a circuit configured to (i) adjust an initial one of a plurality of reference voltages in a read channel of a memory by shifting said initial reference voltage an amount toward a center of a window and (ii) read a codeword from said memory a number of times, wherein (a) said window bounds a sweep of said reference voltages, (b) each retry of said reads uses a respective reference voltage from a pattern of said reference voltages, (c) said pattern is symmetrically spaced about said initial reference voltage and (d) said pattern fits in said window; and a decoder configured to generate read data by performing an iterative decoding procedure on said codeword based on said reads.
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