NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF

摘要

A nonvolatile memory device includes a first memory cell group connected to a first word line and a first bit line group, a second memory cell group connected to the first word line and a second bit line groups (BLGs), a control logic that performs first and second program operations on the first and second memory cell groups, respectively, performs a verification operation on the first memory cell group by pre-charging bit lines in the first and second BLGs at a same time to verify the first program operation, and a verification operation on the second memory cell group by pre-charging the bit lines in the first and second BLGs at a same time to verify the second program operation, and performs a read operation on at least one of the first and second memory cell groups by simultaneously pre-charging the bit lines in the first and second BLGs.

主权项

1. A nonvolatile memory device comprising:
a plurality of memory cells including,
a first memory cell group connected to a first word line and a first bit line group, bit lines in the first bit line group being adjacent to each other,a second memory cell group connected to the first word line and a second bit line group, bit lines in the second bit line group being adjacent to each other; a page buffer circuit configured to sense memory cells connected to the first word line via the first and second bit line groups; and a control logic configured to perform a first program operation with respect to the first memory cell group and perform a second program operation with respect to the second memory cell group, the control logic being configured such that after the control logic performs the first program operation with respect to the first memory cell group, the control logic performs a first verification operation with respect to the first memory cell group by pre-charging bit lines in the first and second bit line groups at a first same time to verify the first program operation, the control logic being configured such that after the control logic performs the second program operation with respect to the second memory cell group, the control logic performs a second verification operation with respect to the second memory cell group by pre-charging the bit lines in the first and second bit line groups at a second same time to verify the second program operation, the control logic being configured such that, when the control logic performs a read operation on at least one of the first memory cell group and the second memory cell group, the control logic simultaneously pre-charges the bit lines in the first and second bit line groups to perform the read operation.