SEMICONDUCTOR DEVICE

摘要

An n− drift region is disposed on the front surface of an n+ semiconductor substrate composed of a wide band gap semiconductor. A p-channel region is selectively disposed on the surface layer of the n− drift region. A high-concentration p+ base region is disposed so as to adjoin the lower portion of the p-channel region inside the n− drift region. Inside the high-concentration p+ base region, an n+ high-concentration region is selectively disposed at the n+ semiconductor substrate side. The n+ high-concentration region has a stripe-shaped planar layout extending to the direction that the high-concentration p+ base regions line up. The n+ high-concentration region adjoins a JFET region at one end portion in longitudinal direction of the stripe. Further, the n+ semiconductor substrate side of the n+ high-concentration region adjoins the part sandwiched between the high-concentration p+ base region and the n+ semiconductor substrate in the n− drift region.

主权项

1. A semiconductor device, comprising:
a semiconductor substrate composed of a semiconductor material with a band gap wider than silicon, wherein the semiconductor substrate has a first conductivity type or a second conductivity type; a first-conductive first semiconductor region composed of the semiconductor material having an impurity concentration lower than the semiconductor substrate, wherein the first-conductive first semiconductor region is disposed on a front surface of the semiconductor substrate; a second-conductive second semiconductor region disposed selectively on a surface layer of the first semiconductor region, wherein the surface layer is disposed at a side opposite to the semiconductor substrate; a first-conductive third semiconductor region disposed selectively inside the second semiconductor region; a first-conductive fourth semiconductor region, which is separated from the third semiconductor region, having an impurity concentration higher than the first semiconductor region, wherein the first-conductive fourth semiconductor region is selectively disposed inside the second semiconductor region and adjoins the first semiconductor region at least at a part thereof; a gate electrode disposed through a gate dielectric film on a surface stretching from one to another of parts sandwiched between the third semiconductor region and the first semiconductor region in each of a plurality of the second semiconductor regions via a surface of the first semiconductor region next to the parts; a first electrode contacting with the second semiconductor region and the third semiconductor region; and a second electrode contacting with a back surface of the semiconductor substrate.