发明名称 |
SYSTEM POWER MANAGEMENT USING COMMUNICATION BUS PROTOCOLS |
摘要 |
Embodiments of an apparatus and method are disclosed that may allow for managing power of a computing system. The apparatus may include a clock generation circuit, a bus interface unit, and a control circuit. The clock generation circuit may be configured to generate multiple clock signals. Each clock signal may provide a timing reference to different functional blocks within a device coupled to the communication bus. The bus interface unit may be configured to receive messages from the device via the communication bus. The messages may include a latency value and a request to activate a low power mode. The control circuit may be configured to deactivate one or more of the multiple clock signals dependent upon the latency value and multiple threshold values. |
申请公布号 |
WO2015041773(A3) |
申请公布日期 |
2015.06.11 |
申请号 |
WO2014US50744 |
申请日期 |
2014.08.12 |
申请人 |
APPLE INC. |
发明人 |
WARREN, DAVID S.;LEVIT, INNA;PAASKE, TIMOTHY R. |
分类号 |
G06F1/32 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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