发明名称 |
STATIC MEMORY CELL |
摘要 |
A static memory cell is provided. The static memory cell includes a data latch circuit and a voltage provider. The data latch circuit is configured to store a bit data. The data latch circuit has a first inverter and a second inverter, and the first inverter and the second inverter are coupled to each other. The first inverter and the second inverter respectively receive a first voltage and a second voltage as power voltages. The voltage provider provides the first voltage and the second voltage to the data latch circuit. When the bit data is written to the data latch circuit, the voltage provider adjusts a voltage value of one of the first and second voltages according to the bit data. |
申请公布号 |
US2015162077(A1) |
申请公布日期 |
2015.06.11 |
申请号 |
US201414200040 |
申请日期 |
2014.03.07 |
申请人 |
Chuang Ching-Te;Chang Chih-Hao;Chung Chao-Kuei;Lu Chien-Yu;Jou Shyh-Jye;Tu Ming-Hsien |
发明人 |
Chuang Ching-Te;Chang Chih-Hao;Chung Chao-Kuei;Lu Chien-Yu;Jou Shyh-Jye;Tu Ming-Hsien |
分类号 |
G11C11/412;G11C11/419 |
主分类号 |
G11C11/412 |
代理机构 |
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代理人 |
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主权项 |
1. A static memory cell comprising:
a data latch circuit configured to store a bit data, the data latch circuit comprising a first inverter and a second inverter coupled to each other, the first inverter and the second inverter respectively receiving a first voltage and a second voltage as power voltages; and a voltage provider coupled to the data latch circuit to provide the first voltage and the second voltage to the data latch circuit, wherein when the bit data is written into the data latch circuit, the voltage provider adjusts a voltage value of the first voltage or a voltage value of the second voltage according to the bit data. |
地址 |
New Taipei City TW |