发明名称 3次元半導体装置の配線構造体
摘要 <p>A three-dimensional semiconductor device includes stacked structures arranged two-dimensionally on a substrate, a first interconnection layer including first interconnections and disposed on the stacked structures, and a second interconnection layer including second interconnections and disposed on the first interconnection layer. Each of the stacked structures has a lower region including a plurality of stacked lower word lines, and an upper region including a plurality of stacked upper word lines disposed on the stack of lower word lines. Each of the first interconnections is connected to one of the lower word lines and each of the second interconnections is connected to one of the upper word lines.</p>
申请公布号 JP5730607(B2) 申请公布日期 2015.06.10
申请号 JP20110029611 申请日期 2011.02.15
申请人 发明人
分类号 H01L27/10;H01L21/336;H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L27/10
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