| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide an information processing unit 100a, even when data is transferred via a serial bus, capable of preventing an occurrence of latency without increasing a memory. <P>SOLUTION: The information processing unit 100a includes: request determination means 302 that determines whether or not a request from a CPU 201 is an indirect read request that causes a first DMA controller 206 to read data of a second RAM 210 and to write it in a first RAM 209; request conversion means 303 that, when the request is the indirect read request, converts the indirect read request into a direct write request that causes a second DMA controller 207 to write the data of the second RAM 210 in the first RAM 209; and request transmission means 304 that transmits the direct write request to the second DMA controller 207. <P>COPYRIGHT: (C)2013,JPO&INPIT</p> |
