| 摘要 |
<p>A prefetch unit prefetches data values from the memory for storage in a cache unit before they are requested by the instruction execution unit. The prefetch unit is configured to perform a miss response comprising increasing a number of the future data values which it prefetches, when a memory access request specifies a pending data value which is already subject to prefetching but is not yet stored in the cache unit. The prefetch unit is also configured, in response to an inhibition condition being met, to temporarily inhibit the miss response for an inhibition period. This may be used in a dynamic pre fetch, using a stride check for example, extrapolating access request patterns to predict future values, where mandatory miss conditions are inevitable when the data is not yet stored in the cache. The inhibition period may be a multiple of the memory latency delay to retrieve values form storage, in a parallel multiple thread environment.</p> |
