发明名称 LEVEL SHIFT CIRCUIT, SEMICONDUCTOR DEVICE
摘要 A level shift circuit includes: a latch circuit (Q5, Q6, Q7, Q8) including first (Q5, Q7) and second (Q6, Q8) inverter circuits; a first input MOS transistor (Q1) operating in accordance with an input signal; a second input MOS transistor (Q2) operating in accordance with an inversion signal of the input signal; and a current-voltage control MOS transistor (Q9). The latch circuit (Q5, Q6, Q7, Q8) outputs a voltage having been converted from the input voltage in level. Each of the first and second input MOS transistors (Q1, Q2) receives the input signal at its gate terminal, and drives the latch circuit (Q5, Q6, Q7, Q8) in accordance with the input signal. The current-voltage control MOS transistor (Q9) is provided between the input MOS transistor (Q1, Q2) and the latch circuit (Q5, Q6, Q7, Q8), and is driven in accordance with an inversion operation of the latch circuit by receiving an input of the control voltage at its gate terminal.
申请公布号 EP2882104(A1) 申请公布日期 2015.06.10
申请号 EP20120882294 申请日期 2012.08.01
申请人 RENESAS ELECTRONICS CORPORATION 发明人 KAWASAKI, YOICHI
分类号 H03K19/0185;G11C16/08;G11C16/12;G11C16/14;G11C16/30;H03K3/356 主分类号 H03K19/0185
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