Trench capacitor with spacer-less fabrication process

摘要

A trench capacitor and method of fabrication are disclosed. The SOI region is doped such that a selective isotropic etch used for trench widening does not cause appreciable pullback of the SOI region, and no spacers are needed in the upper portion of the trench.

主权项

1. A semiconductor structure comprising:
a substrate; an insulator layer disposed on the substrate; a silicon-on-insulator layer disposed on the insulator layer; a trench formed in the substrate, wherein an upper portion of the trench traverses the insulator layer and silicon-on-insulator layer, and a lower portion of the trench is formed within the substrate, and wherein the upper portion has a first width and the lower portion has a second width, and wherein the second width is greater than the first width; and wherein the silicon-on-insulator layer comprises a trench contact region that forms a portion of an interior surface of upper portion of the trench, and wherein a conductive plug is disposed in the trench and wherein the conductive plug is in direct physical contact with the trench contact region of the silicon-on-insulator layer.