发明名称 Semiconductor structure and method of generating masks for making integrated circuit
摘要 A method of generating masks for making an integrated circuit includes determining if a coupling capacitance value of a conductive path of a first and second groups of conductive paths of the integrated circuit is greater than a predetermined threshold value. The determination is performed based on at least a resistance-capacitance extraction result of the conductive path and a predetermined level of mask misalignment. The layout patterns are modified to increase an overall vertical distance between the first group of conductive paths and the second group of conductive paths if the coupling capacitance value is greater than the predetermined threshold value.
申请公布号 US9053255(B2) 申请公布日期 2015.06.09
申请号 US201213650859 申请日期 2012.10.12
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 Lee Hui Yu;Kuo Feng Wei;Kuan Jui-Feng;Cheng Yi-Kan
分类号 H01L21/768;H01L23/48;G06F17/50;G03F1/00 主分类号 H01L21/768
代理机构 Lowe Hauptman & Ham, LLP 代理人 Lowe Hauptman & Ham, LLP
主权项 1. A method of generating masks for making an integrated circuit, the masks comprising layout patterns corresponding to first and second groups of conductive paths of the integrated circuit, and the method comprising: determining, by a hardware processor, if a coupling capacitance value of a conductive path of the first and second groups of conductive paths is greater than a predetermined threshold value, the determination being performed based on at least a resistance-capacitance extraction result of the conductive path and a predetermined level of mask misalignment; and modifying the layout patterns to increase an overall vertical distance between the first group of conductive paths and the second group of conductive paths if the coupling capacitance value is greater than the predetermined threshold value.
地址 TW