Chip package structure and manufacturing method thereof

摘要

An embodiment of the present invention provides a manufacturing method of a chip package structure including: providing a first substrate having a plurality of predetermined scribe lines defined thereon, wherein the predetermined scribe lines define a plurality of device regions; bonding a second substrate to the first substrate, wherein a spacing layer is disposed therebetween and has a plurality of chip support rings located in the device regions respectively and a cutting support structure located on peripheries of the chip support rings, and the spacing layer has a gap pattern separating the cutting support structure from the chip support rings; and cutting the first substrate and the second substrate to form a plurality of chip packages. Another embodiment of the present invention provides a chip package structure.

主权项

1. A chip package structure, comprising:
a first substrate comprising a micro electro-mechanical system chip; a second substrate comprising an application specific integrated circuit chip and disposed on the first substrate; and a spacing layer disposed between the first substrate and the second substrate to separate the first substrate from the second substrate, wherein the spacing layer has a chip support ring and an outer wall structure located on a periphery of the chip support ring, and the chip support ring and the outer wall structure are separated from each other by a gap therebetween.