| 主权项 |
1. A method for fabricating an integrated circuit, the method comprising:
providing a substrate having one or more trenches, wherein a nitrogen-containing layer is disposed over the substrate between each of the one or more trenches; filling the one or more trenches; performing a chemical mechanical polishing on the one or more filled trenches to form one or more device isolation regions, wherein the chemical mechanical polishing includes under polishing the one or more filled trenches, and wherein each of the one or more device isolation regions comprises a thickness; measuring the thickness of each of the one or more device isolation regions; determining, based on the measured thickness of each of the one or more device isolation regions an amount of time to perform a wet etching process to reduce the measured thickness to a target thickness, such that, when at the target thickness, each of the one or more device isolation regions has a top surface that is level with a top surface of other device isolation regions and the top surface of each of the one or more device isolation regions is level with the nitrogen-containing layer; performing the wet etching process for the determined amount of time and re-measuring the thickness of each of the one or more device isolation regions; and determining whether the re-measured thickness of each of the one or more device isolation regions meets the target thickness, wherein if the re-measured thickness of each of the one or more device isolation regions meets the target thickness, removing the nitrogen-containing layer, and wherein if the re-measured thickness of each of the one or more device isolation regions does not meet the target thickness, performing an additional wet etching process for an additional amount of time prior to removing the nitrogen-containing layer. |
