发明名称 Integrated circuit reset system modification tool
摘要 An electronic design automation (EDA) tool that analyzes a circuit design to identify sequential elements (flip-flops) that do not need to be reset, for example, because they do not need to be initialized in order to be in a known state, and converts the identified sequential elements to non-resettable circuits, which saves power and area.
申请公布号 US9053271(B1) 申请公布日期 2015.06.09
申请号 US201414173822 申请日期 2014.02.06
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 Gupta Deep;Dodeja Puneet;Garg Arvind;Jha Pankaj K.
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人 Bergere Charles
主权项 1. An electronic design automation (EDA) tool for modifying an initialization scheme of an integrated circuit design, wherein the integrated circuit design includes a plurality of sequential elements having predefined initial states, and wherein the sequential elements are initialized using an asynchronous initialization signal, the EDA tool comprising: a memory that stores the integrated circuit design; and a processor in communication with the memory, wherein the processor: identifies a first set of sequential elements of the plurality of sequential elements, wherein each of the sequential elements of the first set receives at least one of an external input signal and the asynchronous initialization signal by way of a combinational logic circuit;places a binary value at an output terminal of each of the sequential elements of the first set, wherein the binary value corresponds to a predefined initial state of the corresponding sequential element;identifies a second set of sequential elements of the plurality of sequential elements, wherein at least one of the sequential elements of the second set receives the binary value from one of the sequential elements of the first set;determines present states of each of the sequential elements of the second set;identifies a third set of sequential elements from the second set of sequential elements, wherein for each sequential element of the third set, the determined present state matches a predefined initial state thereof;replaces each sequential element of the third set with a sequential element that is configured to be initialized synchronously, thereby modifying the integrated circuit design; andstores the modified integrated circuit design in the memory.
地址 Austin TX US