发明名称 Semiconductor memory device and method of operating the same
摘要 A semiconductor memory device includes memory blocks including pages connected to plural main cells, a spare block, including pages connected to spare cells, configured to store a random seed for randomization to the spare cells connected to each page, page buffers configured to scramble data inputted for program operation by using random seed read from a page of the spare block selected by a control signal to transmit the scrambled data to the bit line, and configured to descramble data read from a main cell selected for read operation and output the descrambled data, and a controller configured to output the control signal to select a page of the spare block corresponding to an address of a page of the memory block selected for the programming or reading, and configured to control a scramble operation and a descramble operation of the page buffers.
申请公布号 US9053767(B2) 申请公布日期 2015.06.09
申请号 US201213599931 申请日期 2012.08.30
申请人 SK Hynix Inc. 发明人 Cha Jae Won
分类号 G11C7/10;G06F12/02;G11C16/10;G11C16/04;G11C16/06;G11C16/34;G11C7/02 主分类号 G11C7/10
代理机构 IP&T Group LLP 代理人 IP&T Group LLP
主权项 1. A semiconductor memory device, comprising: memory blocks including pages connected to plural main cells; a spare block, including pages connected to spare cells, configured to store a random seed for randomization to the spare cells connected to each page; page buffers, each connected to each of bit lines connected to the spare cell and the main cells, configured to scramble data inputted for program operation by using random seed read from a page of the spare block selected by a control signal to transmit the scrambled data to the bit line, and configured to descramble data read from a main cell selected for read operation and output the descrambled data; and a controller configured to output the control signal to select a page of the spare block corresponding to an address of a page of the memory block selected for the programming or reading, and configured to control a scramble operation and a descramble operation of the page buffers, wherein each of the pages includes: a first latch storing the first data;a second latch storing the random seed; anda third latch copying and storing the random seed stored in the second latch,wherein data stored in the second latch is changed using the first data stored in the first latch, data in the first latch is changed using data stored in the third latch, and the data in the second latch is changed using the data stored in the first latch during the scramble operation.
地址 Gyeonggi-do KR