Correlated double sampling circuit, method thereof and devices having the same

摘要

A CDS circuit includes first capacitors; second capacitors; and a switch arrangement which, in response to a switch control signal, connects the first capacitors in series between a pixel signal output node and a ground to compress the pixel signal and connects the second capacitors in series between a ramp signal output node and the ground to compress the ramp signal, or connects the first capacitors in parallel between the pixel signal output node and a first input node of the comparator and connects the second capacitors in parallel between the ramp signal output node and a second input node of the comparator.

主权项

1. A correlated double sampling (CDS) circuit comprising:
a plurality of first capacitors; a plurality of second capacitors; and a switch arrangement which, in response to a switch control signal, at least one of: connects the plurality of first capacitors in series between a pixel signal output node and a ground to compress the pixel signal and connects the plurality of second capacitors in series between a ramp signal output node and the ground to compress the ramp signal, or connects the plurality of first capacitors in parallel between the pixel signal output node and a first input node of the comparator and connects the plurality of second capacitors in parallel between the ramp signal output node and a second input node of the comparator.