Quantization noise coupling delta sigma ADC with a delay in the main DAC feedback

摘要

A delta-sigma modulator has a first summing point subtracting a first feedback signal from an input signal and forwarding a result to a transfer function, a second summing point adding an output signal from said transfer function to the input signal and subtracting a second feedback signal, a first integrator receiving an output signal from the second summing point, a quantizer receiving an output signal from the integrator and generating an output bitstream, and a digital-to-analog converter receiving the bitstream, wherein the first and second feedback signal are the output signal from said digital-to-analog converter delayed by a one sample delay.

主权项

1. A delta-sigma modulator comprising:
a first summing point subtracting a first feedback signal from an input signal and forwarding a result to a transfer function; a second summing point adding an output signal from said transfer function to said input signal and subtracting a second feedback signal; a first integrator receiving an output signal from said second summing point; a quantizer receiving an output signal from said integrator and generating an output bitstream; a digital-to-analog converter receiving said bitstream, wherein the first and second feedback signal are the output signal from said digital-to-analog converter delayed by a one sample delay, wherein the delta-sigma modulator operates with a charge phase and a transfer phase and quantization is performed in the transfer phase.