Methods of forming a vertical transistor

摘要

Trenches are formed into semiconductive material. Masking material is formed laterally over at least elevationally inner sidewall portions of the trenches. Conductivity modifying impurity is implanted through bases of the trenches into semiconductive material there-below. Such impurity is diffused into the masking material received laterally over the elevationally inner sidewall portions of the trenches and into semiconductive material received between the trenches below a mid-channel portion. An elevationally inner source/drain is formed in the semiconductive material below the mid-channel portion. The inner source/drain portion includes said semiconductive material between the trenches which has the impurity therein. A conductive line is formed laterally over and electrically coupled to at least one of opposing sides of the inner source/drain. A gate is formed elevationally outward of and spaced from the conductive line and laterally adjacent the mid-channel portion. Other embodiments are disclosed.

主权项

1. A method of forming a vertical transistor, comprising:
forming trenches in semiconductive material, the semiconductive material between the trenches comprising an elevationally outer source/drain portion and an elevationally mid-channel portion there-below; forming masking material across bases of the trenches; ion implanting conductivity modifying impurity through the masking material received over the trench bases and through the trench bases into semiconductive material there-below, and providing the impurity into semiconductive material received between the trenches below the mid-channel portion and forming an elevationally inner source/drain below the mid-channel portion, the inner source/drain comprising said semiconductive material between the trenches which has the impurity therein; and forming a gate laterally adjacent the mid-channel portion, a gate dielectric being laterally between the gate and the mid-channel portion.