发明名称 Semiconductor device and a manufacturing method thereof
摘要 The performances of a semiconductor device are improved. The device includes a first MISFET in which hafnium is added to the gate electrode side of a first gate insulation film including silicon oxynitride, and a second MISFET in which hafnium is added to the gate electrode side of a second gate insulation film including silicon oxynitride. The hafnium concentration in the second gate insulation film of the second MISFET is set smaller than the hafnium concentration in the first gate insulation film of the first MISFET; and the nitrogen concentration in the second gate insulation film of the second MISFET is set smaller than the nitrogen concentration in the first gate insulation film of the first MISFET. As a result, the threshold voltage of the second MISFET is adjusted to be smaller than the threshold voltage of the first MISFET.
申请公布号 US9054102(B2) 申请公布日期 2015.06.09
申请号 US201414329294 申请日期 2014.07.11
申请人 Renesas Electronics Corporation 发明人 Yoshimori Hiromasa;Shinohara Hirofumi;Iwamatsu Toshiaki
分类号 H01L29/51;H01L27/088;H01L29/66;H01L21/8234;H01L21/8238 主分类号 H01L29/51
代理机构 Foley & Lardner LLP 代理人 Foley & Lardner LLP
主权项 1. A semiconductor device comprising a first MISFET of a p channel type, a second MISFET of a p channel type and a third MISFET of an n channel type formed over a semiconductor substrate, the first MISFET comprising: a first gate insulation film including a first lower layer film formed over the semiconductor substrate, and a first upper layer film formed over the first lower layer film; and a first gate electrode formed over the first gate insulation film, and the second MISFET comprising: a second gate insulation film including a second lower layer film formed over the semiconductor substrate, and a second upper layer film formed over the second lower layer film; and a second gate electrode formed over the second gate insulation film, the third MISFET comprising: a third gate insulation film including a third lower layer film formed over the semiconductor substrate, and a third upper layer film formed over the third lower layer film; and a third gate electrode formed over the third gate insulation film, wherein the first, second and third lower layer films include silicon, oxygen and nitrogen, respectively,wherein the first, second and third upper layer films are formed of HfO, HfON or HfSiON, respectively, wherein the concentration of hafnium in the second upper layer film is smaller than the concentration of hafnium in the first upper layer film and is smaller than the concentration of hafnium in the third upper layer film, and wherein the concentration of nitrogen in the second lower layer film is smaller than the concentration of nitrogen in the first lower layer film and is smaller than the concentration of nitrogen in the third lower layer film.
地址 Kanagawa JP