Nonvolatile memory device having authentication, and methods of operation and manufacture thereof

摘要

A memory device package encloses two separate die, one being a standard nonvolatile memory integrated circuit (“IC”) die, and the other being any suitable authentication IC die. Either die may be stacked upon the other, or the die may be placed side-by-side. The external contacts may correspond to the power and signal requirements of the standard nonvolatile memory IC die so that the pin-out of the memory device package may present a standard pinout. The power and signal requirements of the authentication IC die may be satisfied with some or all of the pins for the nonvolatile memory integrated circuit die, or with other unused pins of the device package. One or more additional external contacts may be added exclusively for the authentication integrated circuit die. One or more signals may be dedicated as between the standard nonvolatile memory IC die and the authentication IC die.

主权项

1. A memory device comprising:
a package body; a nonvolatile memory integrated circuit die contained in the package body and comprising a first interface, control logic coupled to the first interface, and a nonvolatile memory array coupled to the control logic and to the first interface; an authentication integrated circuit die contained in the package body and comprising a second interface, an authentication engine coupled to the second interface, a volatile memory register coupled to the authentication engine, and a nonvolatile memory array coupled to the authentication engine and to the second interface; and contacts extending from or disposed on the package body and electrically coupled to the first interface and to the second interface; wherein: the first interface and the second interface share a common set of the contacts; the contacts of the common set are compliant with the first interface and comprise at least one signal contact; and the first interface is a serial peripheral interface operable in a plurality of modes, and the second interface is operable in at least one of the modes of the serial peripheral interface.