发明名称 3-LEVEL SEPIC CONVERTER CIRCUIT
摘要 The present invention relates to a 3-level sepic converter circuit. More particularly, The 3-level sepic converter circuit includes: an input inductor connected to one side of an input terminal; first and second switches which are connected in series between the input inductor and the other side of an input terminal; a first capacitor and a first diode which are connected in series between the first switch and one side of an output terminal; a second diode and a second capacitor which are connected in series between the other side of the output terminal and the other side of the input terminal; a first output capacitor and a second output capacitor which are connected to the output terminal; a node between the first capacitor and the first diode; and an output inductor which is connected between the second capacitor and the second diode. A node between the first switch and the second switch is connected to a node between the first output capacitor and the second output capacitor.
申请公布号 KR101523592(B1) 申请公布日期 2015.06.05
申请号 KR20150019188 申请日期 2015.02.09
申请人 INDUSTRIAL COOPERATION FOUNDATION CHONBUK NATIONAL UNIVERSITY 发明人 CHOI, WOO YOUNG;KANG, YONG CHEOL
分类号 H02M3/155 主分类号 H02M3/155
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