Gated Bipolar Junction Transistors, Memory Arrays, and Methods of Forming Gated Bipolar Junction Transistors

摘要

Some embodiments include gated bipolar junction transistors. The transistors may include a base region between a collector region and an emitter region; with a B-C junction being at an interface of the base region and the collector region, and with a B-E junction being at an interface of the base region and the emitter region. The transistors may include material having a bandgap of at least 1.2 eV within one or more of the base, emitter and collector regions. The gated transistors may include a gate along the base region and spaced from the base region by dielectric material, with the gate not overlapping either the B-C junction or the B-E junction. Some embodiments include memory arrays containing gated bipolar junction transistors. Some embodiments include methods of forming gated bipolar junction transistors.

主权项

1. A memory array, comprising:
a series of access lines; a series of bitlines; and a plurality of gated bipolar junction transistors, individual of the gated bipolar junction transistors being uniquely addressed through combinations containing one of the bitlines and one of the access lines; the individual gated bipolar junction transistors comprising:
a vertical transistor pillar having a base region between a pair of emitter/collector regions; one of the emitter/collector regions being a first emitter/collector region and the other being a second emitter/collector region; a first junction being at an interface of the base region and the first emitter/collector region, and a second junction being at an interface of the base region and the second emitter/collector region; at least a portion of the vertical transistor pillar comprising a material having a bandgap greater than or equal to 1.2 eV; the first emitter/collector region being directly electrically coupled with a bitline; anda gate along the base region of the vertical transistor pillar and spaced from the base region by dielectric material; the gate not vertically overlapping either of the first and second junctions; the gate being a region of an access line.