| 摘要 |
<p>The present invention addresses the problem of reducing decreases in the voltage of output voltage even when using a terminal in which the load current is higher than in conventional terminals. This impedance upper (2) is provided with a pair of input terminals (T1, T2), a pair of output terminals (T3, T4), and a transistor (TR1). A first capacitor (C1) is electrically connected between the base of the transistor (TR1) and a reference potential point (RP1). The collector and the base of the transistor (TR1) are electrically connected via a first impedance element (21). A second impedance element (22) is electrically connected between the emitter of the transistor (TR1) and the second output terminal (T4). The first impedance element (21) comprises a first inductor (L1).</p> |
