Two-Stage Operational Amplifier in Class AB

摘要

The invention relates to a two-stage operational amplifier (400) in class AB for driving a load (RLB, RLA) comprising: an input stage (401) comprising differential input terminals (IN, lp) and a first differential output terminal (O1P) and a second differential output terminal (O1N) for providing a first differential driving signal (Out1P) and a second differential driving signal (Out1N), respectively; an output stage (402) comprising a first output branch (403) having a first differential input terminal (I1P) operatively connected to the first differential output terminal (O1P) of the input stage (401) to receive the first differential driving signal (OUT1P) and a second output branch (404) having a second differential input terminal (I1N) operatively connected to the second differential output terminal (O1N) of the output stage (401) to receive the second differential driving signal (Out1N), a control circuit (405) configured to control the output stage (402).

主权项

1. Two-stage operational amplifier in class AB for driving a load comprising:
an input stage comprising differential input terminals and a first differential output terminal and a second differential output terminal for providing a first differential driving signal and a second differential driving signal, respectively; an output stage comprising a first output branch having a first differential input terminal operatively connected to the first differential output terminal of the input stage to receive the first differential driving signal and a second output branch having a second differential input terminal operatively connected to the second differential output terminal of the output stage to receive the second differential driving signal, a control circuit configured to control the output current on the first output branch and the second output branch of the output stage, the control circuit comprising a first PMOS transistor in a diode configuration and operatively connected in a current mirror configuration to a second PMOS transistor of the first output branch of the output stage, a first NMOS transistor connected in series with the first PMOS transistor and having a gate terminal connected to a bias voltage, a third PMOS transistor in a diode configuration and operatively connected in a current mirror configuration to a fourth PMOS transistor of the second output branch of the output stage, a second NMOS transistor connected in series with the third PMOS transistor and having a gate terminal connected to the bias voltage, wherein the control circuit further comprises: a third NMOS transistor operatively connected in parallel with the first NMOS transistor and having a gate terminal arranged to receive the second differential driving signal, and a fourth NMOS transistor operatively connected in parallel with the second NMOS transistor M and having a gate terminal arranged to receive the first differential driving signal.