发明名称 PARALLEL COMPUTER SYSTEM, CONTROL METHOD OF PARALLEL COMPUTER SYSTEM, INFORMATION PROCESSING DEVICE, ARITHMETIC PROCESSING DEVICE, AND COMMUNICATION CONTROL DEVICE
摘要 A parallel computer system includes information processing devices, each of the information processing devices including a communication control device that performs communication, a main memory that stores data, and an arithmetic processing device that is coupled to the communication control device and the main memory, the information processing devices being coupled to each other through a network by the respective communication control device, wherein the arithmetic processing device includes a cache memory and a cache controller, the cache controller that executes an atomic operation for target data on the cache memory that stores the target data when the communication control device outputs an atomic operation request that is used to request the atomic operation, the atomic operation being not divided into a smaller operation, and notifies the communication control device of a result that is obtained by executing the atomic operation on the cache memory.
申请公布号 US2015154115(A1) 申请公布日期 2015.06.04
申请号 US201414540381 申请日期 2014.11.13
申请人 FUJITSU LIMITED 发明人 Hiramoto Shinya;Inoue Tomohiro;Maeda Masahiro;Ando Shun;Toyoda Yuta
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
主权项 1. A parallel computer system comprising: a plurality of information processing devices, each of the plurality of information processing devices including a communication control device that performs communication, a main memory that stores data, and an arithmetic processing device that is coupled to the communication control device and the main memory, the plurality of information processing devices being coupled to each other through a network by the respective communication control device, wherein the arithmetic processing device includes a cache memory and a cache controller, the cache controller that executes an atomic operation for target data on the cache memory that stores the target data when the communication control device outputs an atomic operation request that is used to request the atomic operation, the atomic operation being not divided into a smaller operation, and notifies the communication control device of a result that is obtained by executing the atomic operation on the cache memory.
地址 Kawasaki-shi JP