Resistive Memory Cell Array With Top Electrode Bit Line

摘要

A method for forming a resistive memory cell within a memory array includes forming a patterned stopping layer on a first metal layer formed on a substrate and forming a bottom electrode into features of the patterned stopping layer. The method further includes forming a resistive memory layer. The resistive memory layer includes a metal oxide layer and a top electrode layer. The method further includes patterning the resistive memory layer so that the top electrode layer acts as a bit line within the memory array and a top electrode of the resistive memory cell.

主权项

1. A method for forming a resistive memory cell, the method comprising:
forming a bottom electrode on a substrate; forming a resistive memory layer over at least a portion of the bottom electrode, the resistive memory layer including:
a metal oxide layer; anda top electrode layer; and patterning the resistive memory layer so that the top electrode layer forms both a bit line within a memory array and a top electrode of the resistive memory cell.