ERROR CORRECTION IN SOLID STATE DRIVES (SSD)

摘要

A paging scheme for a Solid State Drive (SSD) error correction mechanism that exchanges portions of a parity component, such as a page, between SRAM and less expensive DRAM, which stores the remainder of a context of pages. A parity operation applies an XOR function to corresponding memory positions in the pages of the context. Dedicated error correction (parity) SRAM need only enough memory for portions of memory, typically a cache line of a page, upon which the parity operation (XOR) is operating. The remaining portions in the context are swapped, or paged out, by cache logic such that the entire context is iteratively processed (XORed) by the parity operation.

主权项

1. A method, comprising:
partitioning a parity component into a plurality of portions, the parity component based on a memory space designated for error correction such that a plurality of parity components define a context; storing corresponding portions of the parity components in a first memory area, the first memory area responsive to a parity operation for computing a parity value for the corresponding portions, a parity value for the context based a plurality of parity components; applying the parity operations to the portions stored in the first memory area; and iteratively replacing the portions with other portions from a second memory area for applying the parity operation to each of the portions until all portions of the parity component have undergone the parity operation, the second memory area sufficiently large for storing the entire context.