Lithography Using High Selectivity Spacers for Pitch Reduction

摘要

A method embodiment for patterning a semiconductor device includes patterning a dummy layer over a hard mask to form one or more dummy lines. A sidewall aligned spacer is conformably formed over the one or more dummy lines and the hard mask. A first reverse material layer is formed over the sidewall aligned spacer. A first photoresist is formed and patterned over the first reverse material layer. The first reverse material layer using the first photoresist as a mask, wherein the sidewall aligned spacer is not etched. The one or more dummy lines are removed, and the hard mask is patterned using the sidewall aligned spacer and the first reverse material layer as a mask. A material used for forming the sidewall aligned spacer has a higher selectivity than a material used for forming the first reverse material layer.

主权项

1. A method for patterning a semiconductor device comprising:
patterning a dummy layer over a hard mask to form one or more dummy lines; forming a sidewall aligned spacer conformably over the one or more dummy lines and the hard mask; forming a first reverse material layer over the sidewall aligned spacer, wherein a material used for forming the sidewall aligned spacer has a higher selectivity than a material used for forming the first reverse material layer; forming a first photoresist over the first reverse material layer; patterning the first photoresist; selectively etching the first reverse material layer using the first photoresist as a mask, wherein the sidewall aligned spacer is not etched; removing the one or more dummy lines; and patterning the hard mask using the sidewall aligned spacer and the first reverse material layer as a mask.