| 摘要 |
<p>The present invention relates to an anti-fuse array of a semiconductor device and an operating method thereof and, more particularly, to anti-fuse array technology capable of minimizing the area consumption of the anti-fuse array. The anti-fuse array of the semiconductor device according to the embodiment of the present invention includes a plurality of first transistors which are formed on the semiconductor substrate by connection with a matrix structure, a plurality of second transistors which are formed on each first end of the first transistors in a first direction in the matrix structure, and a plurality of third transistors which are formed on each second end of the first transistors in a second direction which is vertical to the first direction.</p> |
