Multi-stage codeword detector

摘要

A multi-stage codeword detector 100 and method of operation for detecting codewords from read signals RS received from a multi-level memory device 200. The multi-stage codeword detector 100 includes a first detection stage 110 for a coarse detection of a first codeword C1 from a received read signal RS, a second detection stage 120 for a fine detection of a second codeword C2 from the received read signal RS, and a deciding entity 130 for deciding on using the second detection stage 120 for the received read signal RS in dependence on a reliability indicator RI indicating a certain reliability level of the received read signal RS. The deciding entity may be configured to forward the first codeword C1 after decoding to an output buffer (150 figure 5) if the reliability indicator RI indicated that the reliability level of the RS is higher than a reliability threshold, and to forward the RS to the second detection stage 130 if the reliability indicator indicates the reliability level is less than or equal to a certain reliability threshold. The reliability indicator may include information based on the noise level or error rate of the received signal RS or may be based on temperature or number of set/reset cycles of the memory cells. Preferably a coarse codeword detection unit may be incorporated based on a vector based minimum distance criterion providing a coarse estimated level means (CM) of RS. Similarly a vector based fine level estimation means (FM) is associated with the second codeword. The multi-level memory devise may be a phase change memory device MLC PCM or a MLC Flash device.