发明名称 半導体装置
摘要 <p>Provided is a semiconductor device and a method of manufacturing the same capable of reducing the concentration of stress on the corners of a bonding portion to suppress or prevent the occurrence of a crack in a solder layer in, for example, a temperature cycle reliability test. The semiconductor device according to the invention has a connection structure in which a semiconductor chip (3) is mounted on an insulating substrate (1) having conductor patterns (2a, 2b) bonded to both surfaces thereof and the insulating substrate (1) is bonded to a heat-dissipating base member (4) such that heat generated from the semiconductor chip (3) can be dissipated to the outside. Bonding portions (71, 72) of an internal connection terminal (70) having one end bonded to the conductor pattern (2a) on the front surface of the insulating substrate on which the semiconductor chip (3) is mounted have a circular shape. In addition, a bonding surface of the conductor pattern (2b) on the rear surface of the insulating substrate bonded to the heat-dissipating base member (4) has a rectangular shape and has a predetermined curvature radius in the vicinity of corners. As a result, it is possible to reduce stress applied to the corners of a fixing layer, such as a solder layer, to an elastic limit or less.</p>
申请公布号 JP5729468(B2) 申请公布日期 2015.06.03
申请号 JP20130515137 申请日期 2012.05.11
申请人 发明人
分类号 H01L23/12;H01L21/60;H01L23/40 主分类号 H01L23/12
代理机构 代理人
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