发明名称 Nonvolatile storage device
摘要 According to one embodiment, a method for manufacturing a nonvolatile storage device. The device includes a plurality of first conductive layers each extending in a first direction, a plurality of second conductive layers each extending in a second direction and spaced from the first layers, and memory cells each provided between the first layers and the second layers and including a rectifying element including a semiconductor layer, and a variable resistance element stacked with the rectifying element. The method includes a film formation step, a heating step and a patterning step. The film formation step is configured to form a rectifying element material film including an amorphous semiconductor film. The heating step is configured to heat the rectifying element material film. The patterning step is configured to form the rectifying element including the semiconductor layer by patterning the rectifying element material film after the heating step.
申请公布号 US9048176(B2) 申请公布日期 2015.06.02
申请号 US201213530453 申请日期 2012.06.22
申请人 Kabushiki Kaisha Toshiba 发明人 Sonehara Takeshi;Yasutake Nobuaki
分类号 H01L47/00;H01L29/10;H01L27/24 主分类号 H01L47/00
代理机构 Oblon, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A nonvolatile storage device comprising: a plurality of first conductive layers each extending in a first direction; a plurality of second conductive layers each extending in a second direction non-parallel to the first direction and spaced from the first conductive layers in a third direction orthogonal to the first direction; and memory cells each provided between the plurality of first conductive layers and the plurality of second conductive layers, the memory cell including a rectifying element including a semiconductor layer, and a variable resistance element stacked with the rectifying element in the third direction, at least two adjacent memory cells of a plurality of the memory cells including the semiconductor layer, and the semiconductor layer including polycrystalline silicon, and the polycrystalline silicon including crystal grains of the same orientation, a grain size of at least one of the crystal grains being larger than a distance between the at least two adjacent memory cells.
地址 Tokyo JP