发明名称 Semiconductor packages having warpage compensation
摘要 A semiconductor package can include a substrate body having a first surface and a second surface. A semiconductor chip can be mounted on the first surface and a plurality of electrode pads can be on the second surface and selectively formed to have progressively smaller or larger sizes extending from a central region of the substrate body toward an outer edge of the substrate body based on a reflow soldering process warpage profile for the semiconductor package.
申请公布号 US9048168(B2) 申请公布日期 2015.06.02
申请号 US201314083733 申请日期 2013.11.19
申请人 Samsung Electronics Co., Ltd. 发明人 Kwon Heung-kyu;Lee Seok-won;Kim Hyon-chol;Lee Su-chang;Lee Chi-young
分类号 H01L23/02;H01L23/48;H01L23/00;H01L23/498;H01L25/10;H01L25/00;H01L21/66;H01L23/31 主分类号 H01L23/02
代理机构 Myers Bigel Sibley & Sajovec, P.A. 代理人 Myers Bigel Sibley & Sajovec, P.A.
主权项 1. A stacked semiconductor package comprising: a first semiconductor package comprising a substrate body, a semiconductor chip mounted on an upper surface of the substrate body, and first electrode pads formed outside the semiconductor chip on the upper surface of the substrate body; first external contact electrodes respectively formed on the first electrode pads; and a second semiconductor package that comprises second electrode pads respectively electrically connected to the first external contact electrodes and is stacked on the first semiconductor package via the first external contact electrodes, wherein heights of the first external contact electrodes are determined to be different from each other according to a warpage direction of at least one of the first and second semiconductor packages in a soldering temperature range near a melting point of the first external contact electrodes in a heat treatment process for forming the first external contact electrodes.
地址 KR