主权项 |
1. A semiconductor circuit comprising an ESD power clamp, the ESD power clamp comprising:
a semiconductor substrate of a first conductivity type; a collector region comprising
a buried layer of a second conductivity type within the semiconductor substrate, the second conductivity type opposite the first conductivity type,a first well of the second conductivity type within the semiconductor substrate, the first well disposed above the buried layer of the second conductivity type,a first highly doped region of the second conductivity type disposed above the first well of the second conductivity type,a lightly doped region of the second conductivity type disposed above the buried layer of the second conductivity type, the lightly doped region of the second conductivity type disposed next to the first well of the second conductivity type; a base region comprising
a well of the first conductivity type adjacent to the lightly doped region of the second conductivity type, the well of the first conductivity type separated from the lightly doped region of the second conductivity type by a first region of the semiconductor substrate having a first width, wherein at least a portion of the first region of the semiconductor substrate is disposed directly above the buried layer of the second conductivity type and the well of the first conductivity type is not disposed directly above the buried layer of the second conductivity type, wherein the first region of the semiconductor substrate forms a contiguous region, anda third highly doped region of the first conductivity type disposed above the well of the first conductivity type; and an emitter region comprising a second highly doped region of the second conductivity type disposed above the first region of the semiconductor substrate. |