发明名称 |
Integrated circuit package system employing wafer level chip scale packaging |
摘要 |
An integrated circuit package system that includes: providing a substrate with a protective coating; attaching a labeling film to a support member in a separate process; joining the protective coating and the labeling film; and dicing the substrate, the protective coating, and the labeling film to form the integrated circuit package system. |
申请公布号 |
US9048197(B2) |
申请公布日期 |
2015.06.02 |
申请号 |
US201012709425 |
申请日期 |
2010.02.19 |
申请人 |
STATS ChipPAC Ltd. |
发明人 |
Do Byung Tai;Kuan Heap Hoe |
分类号 |
H01L23/22;H01L23/52;H01L29/40;H01L23/02;H01L23/31;H01L21/56;H01L21/683;H01L23/544;H01L23/00 |
主分类号 |
H01L23/22 |
代理机构 |
Ishimaru & Associates LLP |
代理人 |
Ishimaru & Associates LLP |
主权项 |
1. An integrated circuit package system comprising:
a substrate with a first surface and a second surface, the second surface includes a polished surface for promoting adhesion of subsequent layers; electrical conductors on the first surface of the substrate; a protective coating directly on the second surface of the substrate, the protective coating is optically opaque, and the protective coating includes a coating material having high adhesion strength, durability, and temperature resistance for preventing delamination and for providing structural support for the substrate; and a labeling film on the protective coating, the labeling film includes a curable film having releasable bond properties, a sidewall of the protective coat coplanar to both a sidewall of the substrate and a sidewall of the labeling film. |
地址 |
Singapore SG |