发明名称 Indicating disabled thread to other threads when contending instructions complete execution to ensure safe shared resource condition
摘要 A technique for indicating a safe shared resource condition with respect to a disabled thread provides a mechanism for providing a fast indication to other hardware threads that a temporarily disabled thread can no longer impact shared resources, such as shared special-purpose registers and translation look-aside buffers within the processor core. Signals from pipelines within the core indicates whether any of the instructions pending in the pipeline impact the shared resources and if not, then the thread disable status is presented to the other threads via a state change in a thread status register. Upon receiving an indication that a particular hardware thread is to be disabled, control logic halts the dispatch of instructions for the particular hardware thread, and then waits until any indication that a shared resource is impacted by an instruction has cleared. Then the control logic updates the thread status to indicate the thread is disabled.
申请公布号 US9047079(B2) 申请公布日期 2015.06.02
申请号 US201213435123 申请日期 2012.03.30
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 Bruce Becky;Frazier Giles R.;Frey Bradly G.;Gala Kumar K.;May Cathy;Snyder Michael D.;Whisenhunt Gary;Xenidis James
分类号 G06F9/46;G06F9/30;G06F9/38 主分类号 G06F9/46
代理机构 Mitch Harris, Atty at Law, LLC 代理人 Mitch Harris, Atty at Law, LLC ;Harris Andrew M.;Kalaitzis Parashos T.
主权项 1. A method of providing a safe shared resource condition to one or more hardware threads executing within a multi-threaded processor core, wherein the safe shared resource condition indicates that a particular hardware thread cannot modify a set of shared resources, the method comprising: receiving an indication to disable a particular hardware thread executing within the core; halting dispatch of instructions for the particular hardware thread; determining whether or not dispatched instructions in one or more instruction pipelines of the processor core for the particular hardware thread that impact the set of shared resources have been completed, wherein the shared resources are shared by multiple hardware threads including the particular hardware thread; and responsive to determining that the dispatched instructions that impact the set of shared resources have completed, indicating to at least one other hardware thread that the particular hardware thread can be considered disabled, wherein the indicating only indicates to the at least one other hardware thread that the particular hardware thread is disabled after the determining has determined that the dispatched instructions that impact the set of shared resources have completed.
地址 Armonk NY US