发明名称 |
Superjunction transistor with implantation barrier at the bottom of a trench |
摘要 |
A method for fabricating a semiconductor device is provided. An epitaxial layer is grown on a substrate, wherein the epitaxial layer and the substrate have a first conductivity type. A trench is formed in the epitaxial layer. A barrier region is formed at a bottom of the trench. A doped region of a second conductivity type is formed in the epitaxial layer and surrounds sidewalls of the trench, wherein the barrier region prevents a dopant used for forming the doped region from reaching the epitaxial layer under the barrier region. The trench is filled with a dielectric material. A pair of polysilicon gates is formed on the epitaxial layer and on both sides of the trench. |
申请公布号 |
US9048115(B2) |
申请公布日期 |
2015.06.02 |
申请号 |
US201213661935 |
申请日期 |
2012.10.26 |
申请人 |
VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
Lee Tsung-Hsiung;Tu Shang-Hui;Sheu Gene;Agarwal Neelam;Nidhi Karuna;Lee Chia-Hao;Sihombing Rudy Octavius |
分类号 |
H01L29/78;H01L29/08;H01L21/265;H01L29/66;H01L29/06;H01L29/417;H01L29/10 |
主分类号 |
H01L29/78 |
代理机构 |
Birch, Stewart, Kolasch & Birch, LLP |
代理人 |
Birch, Stewart, Kolasch & Birch, LLP |
主权项 |
1. A method for fabricating a semiconductor device, comprising:
growing an epitaxial layer on a substrate, wherein the epitaxial layer and the substrate have a first conductivity type;
forming a trench in the epitaxial layer;forming a barrier region at a bottom of the trench, wherein the trench has an aspect ratio in a range of 1/12 to 1/8;forming a doped region of a second conductivity type in the epitaxial layer and surrounding sidewalls of the trench by an angled implantation process, wherein an implantation angle of the implantation process is about 2-5 degrees, such that the doped region surrounds a sidewall of the barrier region from a top to a bottom of the sidewall of the barrier region, wherein the barrier region prevents a dopant used for forming the doped region from reaching the epitaxial layer under the barrier region;filling the trench with a dielectric material; andforming a pair of polysilicon gates on the epitaxial layer and on both sides of the trench. |
地址 |
Hsinchu TW |