Frequency and voltage scaling architecture

摘要

A method and apparatus for scaling frequency and operating voltage of at least one clock domain of a microprocessor. More particularly, embodiments of the invention relate to techniques to divide a microprocessor into clock domains and control the frequency and operating voltage of each clock domain independently of the others.

主权项

1. A processor comprising:
a first clock domain to operate at a first clock frequency, the first clock domain including a decoding unit; a second clock domain to operate at a second clock frequency, the second clock domain including at least one execution unit; and a circuit to adjust the first clock frequency to minimize a ratio of an energy performance product of the first clock domain between a first time interval and a second time interval.