发明名称 Power semiconductor device driving circuit
摘要 A power semiconductor device driving circuit includes a gate control terminal, which is provided at a position separated from a drain terminal of a power semiconductor device by a predetermined distance so that electric discharge is generated between the drain terminal and the gate control terminal at the time of generation of surge. A surge voltage is applied to the gate control terminal due to this discharge, the gate of the power semiconductor device is charged to turn on and absorb the surge energy. Thus it becomes possible to suppress the surge voltage applied to the drain terminal and prevent breakdown of the power semiconductor device.
申请公布号 US9048829(B2) 申请公布日期 2015.06.02
申请号 US201414259326 申请日期 2014.04.23
申请人 DENSO CORPORATION 发明人 Kobayashi Atsushi;Takasu Hisashi
分类号 H03K17/08;H03K17/082 主分类号 H03K17/08
代理机构 Posz Law Group, PLC 代理人 Posz Law Group, PLC
主权项 1. A power semiconductor device driving circuit comprising: a power semiconductor device formed of a semiconductor switching device, which controls a current supplied to a first terminal and a second terminal based on a gate voltage applied to a gate terminal, the first terminal and the second terminal being a high-side terminal and a low-side terminal; a gate driving circuit for controlling the gate voltage applied to the gate terminal of the power semiconductor device; a discharge terminal provided at a position separated from the first terminal by a predetermined distance and electrically insulated from the first terminal to cause a discharge between the first terminal and the discharge terminal when the voltage at the first terminal rises by generation of a surge and reaches a dielectric breakdown voltage; an auxiliary power source for supplying an auxiliary power voltage close to the threshold voltage of the power semiconductor device but smaller than a voltage required to fully turn on the power device, wherein the auxiliary power source is powered separately from the surge in providing the auxiliary power voltage; and a gate charge circuit, which turns on the power semiconductor device by charging a gate terminal of the power semiconductor device based on the discharge between the first terminal and the discharge terminal and lowers the voltage of the first terminal by a current flowing between the first terminal and the second terminal, wherein the discharge terminal includes a gate control terminal provided in the gate driving circuit; and the gate charging circuit includes a voltage holding circuit, which is provided in the gate driving circuit and turns on the power semiconductor device by holding the gate terminal in a state that the auxiliary power source is coupled to the gate terminal to couple the auxiliary power voltage to the gate terminal for a predetermined period when the surge voltage is applied to the gate control terminal.
地址 Kariya JP