发明名称 Method for fabricating non-volatile memory device
摘要 A method for fabricating a non-volatile memory device includes alternately stacking a plurality of inter-layer dielectric layers and a plurality of sacrificial layers over a substrate, forming at least a channel hole that exposes the substrate by selectively etching the inter-layer dielectric layers and the sacrificial layers, forming a protective layer on sidewalls of the sacrificial layers that are exposed through the channel hole, sequentially forming a memory layer and a channel layer on the sidewalls of the channel hole, forming slit holes that penetrate through the inter-layer dielectric layers and the sacrificial layers on both sides of the channel hole, removing the sacrificial layers that are exposed through the slit holes, removing the protective layer, and forming gate electrodes in space from which the sacrificial layers and the protective layer are removed.
申请公布号 US9048139(B2) 申请公布日期 2015.06.02
申请号 US201414540840 申请日期 2014.11.13
申请人 SK Hynix Inc. 发明人 Jeon Seok-Min;Hwang Sun-Kak
分类号 H01L21/336;H01L27/115 主分类号 H01L21/336
代理机构 IP & T Group LLP 代理人 IP & T Group LLP
主权项 1. A method for fabricating a non-volatile memory device, comprising: forming a pass gate electrode layer surrounding a sacrificial layer pattern on a substrate; alternately stacking a plurality of inter-layer dielectric layers and a plurality of sacrificial layers over the pass gate electrode layer; forming at least a pair of channel holes that exposes the sacrificial layer pattern by selectively etching the inter-layer dielectric layers and the sacrificial layers; removing the sacrificial layer pattern to form at least a sub-channel hole coupling the pair of the channel holes; forming a protective layer on sidewalls of the sacrificial layers that are exposed through the channel holes; sequentially forming a memory layer and a channel layer on the internal walls of the channel holes and the sub-channel hole; forming slit holes that penetrate through the inter-layer dielectric layers and the sacrificial layers on the both sides of the channel holes; removing the sacrificial layers that are exposed through the slit holes; removing the protective layer; and forming gate electrodes in space from which the sacrificial layers and the protective layer are removed.
地址 Gyeonggi-do KR