Temperature compensation of conductive bridge memory arrays

摘要

Methods for operating a semiconductor memory array including dynamically adjusting control line voltages (e.g., unselected word line or unselected bit line voltages) based on one or more array conditions associated with the semiconductor memory array are described. The one or more array conditions may include a temperature associated with the semiconductor memory array or a particular number of write cycles associated with the semiconductor memory array. In some embodiments, an intermediate voltage is generated based on the one or more array conditions and applied to the unselected word lines and the unselected bit lines of the semiconductor memory array. The one or more intermediate voltages may be generated such that a first voltage difference across unselected memory cells sharing a selected word line is different from a second voltage difference across other unselected memory cells sharing a selected bit line based on the one or more array conditions.

主权项

1. A method for operating a monolithic three-dimensional memory array, comprising:
acquiring a temperature associated with the monolithic three-dimensional memory array, the monolithic three-dimensional memory array includes a first storage element and a second storage element, the first storage element is located above the second storage element, the second storage element is located above a substrate, the monolithic three-dimensional memory array includes a plurality of word lines arranged in a first direction and a plurality of bit lines arranged in a second direction perpendicular to the first direction, the plurality of word lines includes a selected word line and a plurality of unselected word lines, the plurality of bit lines includes a selected bit line and a plurality of unselected bit lines, the first storage element is in communication with the selected word line and the selected bit line, the monolithic three-dimensional memory array includes a plurality of unselected storage elements in communication with the plurality of unselected word lines and the plurality of unselected bit lines; applying a first voltage difference across the plurality of unselected storage elements based on the temperature; and setting the first storage element into a first state while performing the applying a first voltage difference across the plurality of unselected storage elements, the setting the first storage element into a first state includes applying a second voltage difference across the first storage element.