Lateral double diffused metal oxide semiconductor device and method for manufacturing the same

摘要

An LDMOS device includes a second conduction type buried layer, a first conduction type drain extension region configured to be formed on and/or over a region of the second conduction type buried layer, a second conduction type drain extension region configured to be formed in a partial region of the first conduction type drain extension region, a first conduction type body, a first guard ring configured to be formed around the second conduction type drain extension region and configured to include a second conduction type impurity layer, and a second guard ring configured to be formed around the first guard ring and configured to include a high-voltage second conduction type well and a second conduction type impurity layer. Further, the second conduction type impurity layer of the first guard ring and the second conduction type impurity layer of the second guard ring operate as an isolation.

主权项

1. A laterally diffused metal oxide semiconductor (LDMOS) device comprising:
an epitaxial layer having a first conduction type; a buried layer in the epitaxial layer, the buried layer having a second conduction type opposite to the first conduction type; a first drain extension region over a first region of the buried layer, the first drain extension region having the first conduction type; a second drain extension region in the first drain extension region, the second drain extension region having the second conduction type; a gate pattern over the second drain extension region and a drain region in the second drain extension region; a body having a contact surface with the second drain extension region and further including a source region, the body having the first conduction type; an isolation structure, comprising:
a first guard ring around the second drain extension region and including a first impurity layer, wherein the first impurity layer having the second conduction type; anda second guard ring around the first guard ring and including a high-voltage well connected to a second region of the buried layer, and the high-voltage well includes a second impurity layer, wherein the second impurity layer having the second conduction type, a third guard ring adjacent to the second guard ring and having the first conduction type; and a fourth guard ring adjacent to the third guard ring and having the second conduction type.