时脉全自旋逻辑电路;CLOCKED ALL-SPIN LOGIC CIRCUIT

摘要

描述一闩包含：第一全自旋逻辑(ASL)装置；耦接至第一ASL装置的第二ASL装置，第二ASL装置藉由时脉讯号为可控制的；及耦接至第二ASL装置的第三ASL装置，其中第一ASL装置和第三ASL装置具有耦接至电源端子之各自的磁铁。描述一正反器，其包含：第一ASL装置；耦接至第一ASL装置的第二ASL装置，第二ASL装置藉由第一时脉讯号为可控制的；耦接至第二ASL装置的第三ASL装置，第三ASL装置藉由第二时脉讯号为可控制的，第二时脉讯号相对于第一时脉讯号为不同相位的；及耦接至第三ASL装置的第四ASL装置，其中第一ASL装置和第四ASL装置具有耦接至电源端子之各自的磁铁。; a second ASL device coupled to the first ASL device, the second ASL device controllable by a clock signal; and a third ASL device coupled to the second ASL device, wherein the first and third ASL devices have respective magnets coupled to a power supply terminal. Described is a flip-flop which comprises: a first ASL device; a second ASL device coupled to the first ASL device, the second ASL device controllable by a first clock signal; a third ASL device coupled to the second ASL device, the third ASL device controllable by a second clock signal, the second clock signal being out of phase relative to the first clock signal; and a fourth ASL device coupled to the third ASL device, wherein the first and fourth ASL devices have respective magnets coupled to a power supply terminal.